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AOZ1018
EZBuckTM 2A Simple Regulator
General Description
The AOZ1018 is a high efficiency, simple to use, 2A buck regulator. The AOZ1018 works from a 4.5V to 16V input voltage range, and provides up to 2A of continuous output current with an output voltage adjustable down to 0.8V. The AOZ1018 comes in SO-8 packages and is rated over a -40C to +85C ambient temperature range.
Features

4.5V to 16V operating input voltage range 130 m internal PFET switch for high efficiency: up to 95% Internal soft start Output voltage adjustable to 0.8V 2A continuous output current Fixed 500kHz PWM operation Cycle-by-cycle current limit Short-circuit protection Thermal shutdown Small size SO-8 packages
Applications

Point of load dc/dc conversion PCIe graphics cards Set top boxes DVD drives and HDD LCD panels Cable modems Telecom/Networking/Datacom equipment
Typical Application
C1 22F
Cd 1F
VIN
L1 4.7H
From PC
EN
VOUT
AOZ1018
COMP
RC CC
LX R1 FB
D1
+3.3V Output @ 2A
C2 47F R2
AGND
PGND
Figure 1. 3.3V/2A Buck Regulator
Rev. 1.0 November 2006
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Page 1 of 14
AOZ1018
Ordering Information
Part Number
AOZ1018AI
HS nt Ro mplia Co
Ambient Temperature Range
-40C to +85C
Package
SO-8
Environmental
RoHS
All AOS Products are offered in packaging with Pb-free plating and compliant to RoHS standards. Please visit wwww.aosmd.com/web/rohs_compliant.jsp for additional information.
Pin Configuration
NC VIN AGND FB
1 2 3 4 8 7 6 5
PGND LX EN COMP
SO-8
(Top View)
Pin Description
Pin Number
1 2 3 4 5 6 7 8
Pin Name
NC VIN AGND FB COMP EN LX PGND Not connected.
Pin Function
Supply voltage input. When VIN rises above the UVLO threshold the device starts up. Reference connection for controller section. Also used as thermal connection for controller section. Electrically needs to be connected to PGND. The FB pin is used to determine the output voltage via a resistor divider between the output and GND. External loop compensation pin. The enable pin is active high. Connect EN pin to VIN if not used. Do not leave the EN pin floating. PWM output connection to inductor. Thermal connection for output stage. Power ground. Electrically needs to be connected to AGND.
Block Diagram
VIN
EN
UVLO & POR
5V LDO Regulator
Internal +5V
OTP
+
ISen Reference & Bias
-
Softstart ILimit
Q1
+
0.8V
+
EAmp
- +
FB
-
PWM Comp
PWM Control Logic
Level Shifter + FET Driver
LX
COMP
500kHz Oscillator
AGND
PGND
Rev. 1.0 November 2006
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AOZ1018
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the device.
Recommend Operating Ratings
The device is not guaranteed to operate beyond the Maximum Operating Ratings.
Parameter
Supply Voltage (VIN) LX to AGND EN to AGND FB to AGND COMP to AGND PGND to AGND Junction Temperature (TJ) Storage Temperature (TS)
Rating
18V -0.7V to VIN+0.3V -0.3V to VIN+0.3V -0.3V to 6V -0.3V to 6V -0.3V to +0.3V +150C -65C to +150C
Parameter
Supply Voltage (VIN) Output Voltage Range Ambient Temperature (TA) Package Thermal Resistance SO-8 (JA)(1)
Rating
4.5V to 16V 0.8V to VIN -40C to +85C 105C/W
Note: 1. The value of JA is measured with the device mounted on 1-in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25C. The value in any given application depends on the user's specific board design.
Electrical Characteristics
Symbol
VIN VUVLO IIN IOFF VFB
TA = 25C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(2)
Parameter
Supply Voltage Input Under-Voltage Lockout Threshold Supply Current (Quiescent) Shutdown Supply Current Feedback Voltage Load Regulation Line Regulation
Conditions
VIN Rising VIN Falling IOUT = 0, VFB = 1.2V, VEN >1.2V VEN = 0V
Min.
4.5
Typ.
4.00 3.70 2 3
Max.
16
Units
V V
3 20 0.818
mA A V % %
0.782
0.8 0.5 1
IFB VEN VHYS fO DMAX DMIN
Feedback Voltage Input Current EN Input threshold EN Input Hysteresis Frequency Maximum Duty Cycle Minimum Duty Cycle Error Amplifier Voltage Gain Error Amplifier Transconductance 500 200 2.5 TJ Rising TJ Falling 145 100 4 VIN = 12V VIN = 5V 97 166 350 100 Off Threshold On Threshold 2.0 100 500
200 0.6
nA V mV
MODULATOR 600 6 kHz % % V/ V A / V 3.6 A C ms 130 200
PROTECTION ILIM Current Limit Over-Temperature Shutdown Limit tSS Soft Start Interval High-Side Switch On-Resistance
OUTPUT STAGE m
Note: 2. Specification in BOLD indicate an ambient temperature range of -40C to +85C. These specifications are guaranteed by design. Rev. 1.0 November 2006
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AOZ1018
Typical Performance Characteristics
Circuit of Figure 1. TA = 25C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Vin ripple
0.1V/div
Full Load (CCM) Operation
Vin ripple
0.1V/div
Vo ripple
20mV/div
Vo ripple
20mV/div
IL 1A/div VLX 10V/div
IL 1A/div VLX 10V/div
1s/div
1s/div
Startup to Full Load
Vin 5V/div
Full Load to Turnoff
Vo 1V/div
Vin 5V/div
Iin 0.5A/div
Vo 1V/div Iin 0.5A/div
1ms/div
1ms/div
50% to 100% Load Transient
Light Load to Turnoff
Vo Ripple
50mV/div
Vin 5V/div
Vo 1V/div
Io 1A/div
Iin 0.5A/div
100s/div
1s/div
Rev. 1.0 November 2006
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AOZ1018
Typical Performance Characteristics (Continued)
Circuit of Figure 1. TA = 25C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Short Circuit Protection
Short Circuit Recovery
Vo
2V/div
Vo
2V/div
IL 1A/div
IL 1A/div
100s/div
1ms/div
AOZ1018AI Efficiency
100
8.0V OUTPUT 95 5.0V OUTPUT 90 3.3V OUTPUT 85
Efficieny (%)
80
75
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Load Current (A)
Note: 3. Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board. 25C ambient temperature and natural convection (air speed <50LFM) unless otherwise specified.
Derating Curve at 5/6V Input
2.5 2.5 1.8V, 3.3V, 5V OUTPUT
Derating Curve at 12V Input
Output Current (IO)
1.8V, 3.3V, 5V, 8V OUTPUT
Output Current (IO)
2.0 1.5 1.0 0.5
2.0 1.5 1.0 0.5
air speed less than 50lfm
air speed less than 50lfm
0 25
35
45
55
65
75
85
0 25
35
45
55
65
75
85
Ambient Temperature (TA)
Rev. 1.0 November 2006
Ambient Temperature (TA)
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AOZ1018
Detailed Description
The AOZ1018 is a current-mode step down regulator with integrated high side PMOS switch. It operates from a 4.5V to 16V input voltage range and supplies up to 2A of load current. The duty cycle can be adjusted from 6% to 100% allowing a wide range of output voltage. Features include enable control, Power-On Reset, input under voltage lockout, fixed internal soft-start and thermal shut down. The AOZ1018 is available in SO-8 package. seen in a circuit which is using an NMOS switch. It allows 100% turn-on of the upper switch to achieve linear regulation mode of operation. The minimum voltage drop from VIN to VO is the load current times DC resistance of MOSFET plus DC resistance of buck inductor. It can be calculated by the following equation:
V OMAX = V IN - I O x ( R DS ( ON ) + R inductor )
where; VOMAX is the maximum output voltage, VIN is the input voltage from 4.5V to 16V, IO is the output current from 0A to 2A, RDS(ON) is the on resistance of internal MOSFET, the value is between 97m and 200m depending on input voltage and junction temperature, and Rinductor is the inductor DC resistance.
Enable and Soft Start
The AOZ1018 has internal soft start feature to limit inrush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when the input voltage rises to 4.0V and voltage on EN pin is HIGH. In soft start process, the output voltage is ramped to regulation voltage in typically 4ms. The 4ms soft start time is set internally. The EN pin of the AOZ1018 is active high. Connect the EN pin to VIN if enable function is not used. Pull it to ground will disable the AOZ1018. Do not leave it open. The voltage on EN pin must be above 2.0 V to enable the AOZ1018. When voltage on EN pin falls below 0.6V, the AOZ1018 is disabled. If an application circuit requires the AOZ1018 to be disabled, an open drain or open collector circuit should be used to interface to EN pin.
Switching Frequency
The AOZ1018 switching frequency is fixed and set by an internal oscillator. The practical switching frequency could range from 350kHz to 600kHz due to device variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to the FB pin with a resistor divider network. In the application circuit shown in Figure 1. The resistor divider network includes R1 and R2. Usually, a design is started by picking a fixed R2 value and calculating the required R1 with equation below.
Steady-State Operation
Under steady-state conditions, the converter operates in fixed frequency and Continuous-Conduction Mode (CCM). The AOZ1018 integrates an internal P-MOSFET as the high-side switch. Inductor current is sensed by amplifying the voltage drop across the drain to source of the high side power MOSFET. Output voltage is divided down by the external voltage divider at the FB pin. The difference of the FB pin voltage and reference is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal, which is sum of inductor current signal and ramp compensation signal, at PWM comparator input. If the current signal is less than the error voltage, the internal high-side switch is on. The inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high-side switch is off. The inductor current is freewheeling through the external Schottky diode to output. The AOZ1018 uses a P-Channel MOSFET as the high side switch. It saves the bootstrap capacitor normally
Rev. 1.0 November 2006
R 1 V O = 0.8 x 1 + ------ R 2
Some standard value of R1, R2 for most commonly used output voltage values are listed in Table 1. Table 1. VO (V)
0.8 1.2 1.5 1.8 2.5 3.3 5.0 1.0 4.99 10 12.7 21.5 31.6 52.3
R1 (k)
10 11.5 10.2 10 10 10
R2 (k)
open
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AOZ1018
Combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss. Since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper PMOS and inductor. control of soft-start circuit when the junction temperature decreases to 100C.
Application Information
The basic AOZ1018 application circuit is shown in Figure 1. Component selection is explained below. Input Capacitor The input capacitor must be connected to the VIN pin and PGND pin of the AOZ1018 to maintain steady input voltage and filter out the pulsing input current. The voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. The input ripple voltage can be approximated by equation below:
Protection Features
The AOZ1018 has multiple protection features to prevent system circuit damage under abnormal conditions. Over Current Protection (OCP) The sensed inductor current signal is also used for over current protection. Since AOZ1018 employs peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage is limited to be between 0.4V and 2.5V internally. The peak inductor current is automatically limited cycle by cycle. The cycle by cycle current limit threshold is set between 2.54A and 3.65A. When the load current reaches the current limit threshold, the cycle by cycle current limit circuit turns off the high side switch immediately to terminate the current duty cycle. The inductor current stop rising. The cycle by cycle current limit protection directly limits inductor peak current. The average inductor current is also limited due to the limitation on peak inductor current. When cycle by cycle current limit circuit is triggered, the output voltage drops as the duty cycle decreasing. The AOZ1018 has internal short circuit protection to protect itself from catastrophic failure under output short circuit conditions. The FB pin voltage is proportional to the output voltage. Whenever FB pin voltage is below 0.2V, the short circuit protection circuit is triggered. As a result, the converter is shut down and hiccups at a frequency equals to 1/8 of normal switching frequency. The converter will start up via a soft start once the short circuit condition disappears. In short circuit protection mode, the inductor average current is greatly reduced because of the low hiccup frequency. Power-On Reset (POR) A power-on reset circuit monitors the input voltage. When the input voltage exceeds 4V, the converter starts operation. When input voltage falls below 3.7V, the converter will be shut down. Thermal Protection An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and high side PMOS if the junction temperature exceeds 145C. The regulator will restart automatically under the
Rev. 1.0 November 2006
IO VO VO V IN = ------------------ x 1 - --------- x --------V IN V IN f x C IN
Since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck circuit, the RMS value of input capacitor current can be calculated by:
VO VO I CINRMS = I O x --------- 1 - --------- V IN V IN
if let m equal the conversion ratio:
VO --------- = m V IN
The relation between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2 below. It can be seen that when VO is half of VIN, CIN is under the worst current stress. The worst current stress on CIN is 0.5 x IO.
0.5 0.4 ICINRMS(m) 0.3 IO 0.2 0.1 0
0
0.5 m
1
Figure 2. ICIN vs. Voltage Conversion Ratio
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AOZ1018
For reliable operation and best performance, the input capacitors must have current rating higher than ICINRMS at worst operating conditions. Ceramic capacitors are preferred for input capacitors because of their low ESR and high ripple current rating. Depending on the application circuits, other low ESR tantalum or electrolytic capacitor may also be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufactures are based on certain amount of life time. Further de-rating may be necessary for practical design requirement. Inductor The inductor is used to supply constant current to output when it is driven by a switching voltage. For given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is, When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. The inductor takes the highest current in a buck circuit. The conduction loss on inductor needs to be checked for thermal and efficiency requirements. Surface mount inductors in different shape and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise. But they cost more than unshielded inductors. The choice depends on EMI requirement, price and size. Table 2 lists some inductors for typical output voltage design. Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below:
VO VO I L = ----------- x 1 - --------- V IN f xL
The peak inductor current is:
I L I Lpeak = I O + -------2
High inductance gives low inductor ripple current but requires larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through inductor and switches, which results in less conduction loss.
1 V O = I L x ES R CO + -------------------------- 8 x f x C O
Table 2. Typical Inductors VOUT (V)
5.0 Unshielded, 4.7H LQH55DN4R7M03 Shielded, 4.7H LQH66SN4R7M03 Shield, 5.8H ET553-5R8 Un-shielded, 6.7H DO3316P-682MLD 3.3 Unshielded, 4.7H LQH55DN3R3M03 Shield, 4.7H LQH66SN3R3M03 Shield, 3.3H ET553-3R3 Un-shielded, 4.7H DO3316P-472MLD Un-shielded, 4.7H DO1813P-472HC 1.8 Unshielded, 2.2H LQH55DN1R5M03 Shield, 2.2H LQH66SN1R5M03 Shield, 2.2H ET553-2R2 Un-shielded, 2.2H DO3316P-222MLD Un-shielded, 2.2H DO1813P-222HC
Rev. 1.0 November 2006
L1
Manufacture
MURATA MURATA ELYTONE Coilcraft MURATA MURATA ELYTONE Coilcraft Coilcraft MURATA MURATA ELYTONE Coilcraft Coilcraft
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AOZ1018
where CO is output capacitor value and ESRCO is the Equivalent Series Resistor of output capacitor. When low ESR ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to: With peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. The pole is dominant pole and can be calculated by:
1 f p1 = ----------------------------------2 x C O x R L
The zero is a ESR zero due to output capacitor and its ESR. It is can be calculated by:
1 V O = I L x -------------------------8xf xC
O
If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to:
1 f Z 1 = ------------------------------------------------2 x C O x ESR CO
where; CO is the output filter capacitor, RL is load resistor value, and ESRCO is the equivalent series resistance of output capacitor.
V O = I L x ES R CO
For lower output ripple voltage across the entire operating temperature range; X5R or X7R dielectric type of ceramic, or other low ESR tantalum or electrolytic output capacitor is recommended. In a buck converter, output capacitor current is continuous. The RMS current of output capacitor is decided by the peak to peak inductor ripple current. It can be calculated by:
The compensation design is actually to shape the converter close loop transfer function to get desired gain and phase. Several different types of compensation network can be used for the AOZ1018. For most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable highbandwidth control loop. In the AOZ1018, FB pin and COMP pin are the inverting input and the output of internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is:
I L I CORMS = ---------12
Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, output capacitor could be overstressed.
G EA f p2 = ------------------------------------------2 x C C x G VEA
where; GEA is the error amplifier transconductance, which is 200 x 10-6 A/V, GVEA is the error amplifier voltage gain, which is 500 V/V, and CC is compensation capacitor.
Schottky Diode Selection
The external freewheeling diode supplies the current to the inductor when the high side PMOS switch is off. To reduce the losses due to the forward voltage drop and recovery of diode, Schottky diode is recommended to use. The maximum reverse voltage rating of the chosen Schottky diode should be greater than the maximum input voltage, and the current rating should be greater than the maximum load current.
The zero given by the external compensation network, capacitor CC and resistor RC, is located at:
1 f Z 2 = -----------------------------------2 x C C x R C
To design the compensation circuit, a target crossover frequency fC for close loop must be selected. The system crossover frequency is where control loop has unity gain. The crossover frequency is also called the converter bandwidth. Generally a higher bandwidth means faster response to load transient. However, the bandwidth should not be too high because of system stability
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Loop Compensation
The AOZ1018 employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design.
Rev. 1.0 November 2006
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AOZ1018
concern. When designing the compensation loop, converter stability under all line and load condition must be considered. Usually, it is recommended to set the bandwidth to be less than 1/10 of switching frequency. The AOZ1018 operates at a fixed switching frequency range from 350kHz to 600kHz. It is recommended to choose a crossover frequency less than 30kHz. flows in the first loop when the high side switch is on. The second loop starts from inductor, to the output capacitors and load, to the anode of Schottky diode, to the cathode of Schottky diode. Current flows in the second loop when the low side diode is on. In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is strongly recommended to connect input capacitor, output capacitor, and PGND pin of the AOZ1018. In the AOZ1018 buck regulator circuit, the major power dissipating components are the AOZ1018, the Schottky diode and output inductor. The total power dissipation of converter circuit can be measured by input power minus output power.
f C = 30kHz
The strategy for choosing RC and CC is to set the cross over frequency with RC and set the compensator zero with CC. Using selected crossover frequency, fC, to calculate RC:
2 x C O VO R C = f C x ----------- x ----------------------------V G xG
FB EA CS where; fC is desired crossover frequency, VFB is 0.8V, GEA is the error amplifier transconductance, which is A/V, and 200x10-6
P totalloss = V IN x I IN - V O x I O
The power dissipation in Schottky can be approximated as:
P diodeloss = I O x ( 1 - D ) x V FWSchottky
where; VFWSchottky is the Schottky diode forward voltage drop.
GCS is the current sense circuit transconductance, which is 5.64 A/V.
The power dissipation of inductor can be approximately calculated by output current and DCR of inductor.
The compensation capacitor CC and resistor RC together make a zero. This zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of selected crossover frequency. CC can is selected by:
P inductorloss = I O2 x R inductor x 1.1
The junction to ambient temperature can be calculated with power dissipation in the AOZ1018 and thermal impedance from junction to ambient.
1.5 C C = -----------------------------------2 x R C x f p1
Equation above can also be simplified to:
T jun-amb = ( P totalloss - P diodeloss - P inductorloss ) x JA
The maximum junction temperature of AOZ1018 is 145C, which limits the maximum load current capability. Please see the thermal de-rating curves for maximum load current of the AOZ1018 under different ambient temperature. The thermal performance of the AOZ1018 is strongly affected by the PCB layout. Extra care should be taken by users during design process to ensure that the IC will operate under the recommended environmental conditions. Several layout tips are listed below for the best electric and thermal performance. Figure 3 illustrates a PCB layout example as reference.
CO x RL C C = ---------------------RC
An easy-to-use application software which helps to design and simulate the compensation loop can be found at www.aosmd.com.
Thermal Management and Layout Consideration
In the AOZ1018 buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pins, to the filter inductor, to the output capacitor and load, and then return to the input capacitor through ground. Current
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AOZ1018
Figure 3. AOZ1018 PCB Layout
1. Do not use thermal relief connection to the VIN and the PGND pin. Pour a maximized copper area to the PGND pin and the VIN pin to help thermal dissipation. 2. Input capacitor should be connected to the VIN pin and the PGND pin as close as possible. 3. A ground plane is preferred. If a ground plane is not used, separate PGND from AGND and connect them only at one point to avoid the PGND pin noise coupling to the AGND pin. In this case, put small decoupling capacitor to stabilize the input voltage of IC. 4. Make the current trace from LX pin to L to Co to the PGND as short as possible.
5. Pour copper plane on all unused board area and connect it to stable DC nodes, like VIN, GND or VOUT. 6. The LX pin is connected to internal PFET drain. They are low resistance thermal conduction path and most noisy switching node. Connected a copper plane to LX pin to help thermal dissipation. This copper plane should not be too larger otherwise switching noise may be coupled to other part of circuit. 7. Keep sensitive signal trace far away form the LX pin.
Rev. 1.0 November 2006
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AOZ1018
Package Dimensions
D e 8 L Gauge Plane Seating Plane 0.25
E
E1
h x 45 1 C
7 (4x)
0.1
A2 A
b
A1
Dimensions in millimeters
2.20 Symbols A A1 A2 b c D E1 e E h L Min. 1.35 0.10 1.25 0.31 0.17 4.80 3.80 Nom. 1.65 -- 1.50 -- -- 4.90 3.90 1.27 BSC 5.80 6.00 0.25 -- 0.40 -- 0 -- Max. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8
Dimensions in inches
Symbols A A1 A2 b c D E1 e E h L Min. 0.053 0.004 0.049 0.012 0.007 0.189 0.150 Nom. Max. 0.065 0.069 -- 0.010 0.059 0.065 -- 0.020 -- 0.010 0.193 0.197 0.154 0.157 0.050 BSC 0.228 0.236 0.244 0.010 -- 0.020 0.016 -- 0.050 0 -- 8
5.74
1.27
0.80 Unit: mm
Notes: 1. All dimensions are in millimeters. 2. Dimensions are inclusive of plating 3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils. 4. Dimension L is measured in gauge plane. 5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.0 November 2006
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AOZ1018
Tape and Reel Dimensions
SO-8 Carrier Tape
D1 T See Note 5 E1 E2 E P1 P2 See Note 3
See Note 3 B0 K0 A0 Unit: mm Package SO-8 (12mm) A0 6.40 0.10 B0 5.20 0.10 K0 2.10 0.10 D0 1.60 0.10 D1 1.50 0.10 E 12.00 0.10 E1 1.75 0.10 E2 5.50 0.10 P0 8.00 0.10 P1 4.00 0.10 P2 2.00 0.10 T 0.25 0.10 D0 P0 Feeding Direction
SO-8 Reel
W1
S G M V N K
R H W W N Tape Size Reel Size M 12mm o330 o330.00 o97.00 13.00 0.10 0.30 0.50 W1 17.40 1.00 K H 10.60 o13.00 +0.50/-0.20 S 2.00 0.50 G -- R -- V --
SO-8 Tape
Leader/Trailer & Orientation
Trailer Tape 300mm min. or 75 empty pockets
Components Tape Orientation in Pocket
Leader Tape 500mm min. or 125 empty pockets
Rev. 1.0 November 2006
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AOZ1018
AOZ1018 Package Marking
Z1018AI FAYWLT
Part Number
Fab & Assembly Location Year & Week Code
Assembly Lot Code
Rev. 1.0 November 2006
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